PCIe 2.0 2输出时钟发生器产生hcsl with
Features
Features
Î PCIe® 2.0 compliant
Îpcie®2.0兼容
à Phase jitter - 2.1ps RMS (typ)
在2.1ps RMS相位抖动（型）。
Î LVDS compatible outputs
ÎLVDS兼容输出
Î Supply voltage of 3.3V ±10%
Î3.3V的电源电压：±10 %
Î 25MHz crystal or clock input frequency
晶体或时钟输入频率25MHzÎ
Î HCSL outputs, 0.8V Current mode differential pair
Îhcsl 0.8V输出，电流模式差分对
Î Jitter 35ps cycle-to-cycle (typ)
均匀Î抖动循环（典型的）
Î Spread of -0.5%, -0.75%, and no spread
Îspread of -0.75 %～0.5%，不会传播，and
Î Industrial temperature range
Î工业温度范围
Î Spread Bypass option available
该选项可Î旁路
Î Spread and frequency selection via external pins
通过外部的传播与Î频率选择引脚
Î Packaging: (Pb-free and Green)
包装：Î（Free and（绿色）
à 16-pin TSSOP (L16)
在16引脚TSSOP（L16）
à 16-pin QSOP (Q16)
在qsop 16引脚（16）
Description
描述
The PI6C557-03A is a spread spectrum clock generator compliant
文章是《pi6c557 -扩频时钟发生器产生符合
to PCI Express® 2.0 and Ethernet requirements. The device is
express®2.0 and to PCI以太网的要求。the device is
used for PC or embedded systems to substantially reduce Electromagnetic
used for PC或嵌入式系统基本上减少了电磁
Interference (EMI).
干扰（EMI）。
The PI6C557-03A provides two differential (HCSL) or LVDS
文章pi6c557 provides the two -差分LVDS（hcsl）or
spread spectrum outputs. The PI6C557-03A is configured to select
扩频输出。文章pi6c557 is to the -构型的选择
spread and clock selection. Using Pericom's patented PhaseLocked
传播与时钟选择。百利通’s patented使用锁相
Loop (PLL) techniques, the device takes a 25MHz crystal
环（PLL）技术，the device一个25MHz的晶体
input and produces two pairs of differential outputs (HCSL) at
有两个输入和输出（Differential Pairs of hcsl at）
25MHz, 100MHz, 125MHz and 200MHz clock frequencies. It
25MHz，125MHz的时钟频率为100MHz，and。它
also provides spread selection of -0.5%, -0.75%, and no spread.
（also provides Selection of %～0.5%，-0.75，and不会传播。
请联系我们:
蔡晓玲 手机 15013430878
QQ 2450338923